Job Details: Job Description: Develops the logic design, register transfer level (RTL) coding, and simulation for Network on Chip IPs and potentially other FPGA IPs & subsystem for integration in full chip designs. Participates in the
ASIC Design Engineer 吉隆坡 全职 芯片板块 职位描述 ResponsibilitiesISP Module RTL DesignDesign and implement RTL for one or more blocks in the ISP pipeline (RAW / RGB / YUV domain, 3A statistics, geometric / scaling, etc.) under
Senior Staff ASIC Design Engineer 吉隆坡 全职 芯片板块 职位描述 ResponsibilitiesISP Module / Sub-System OwnershipOwn the micro-architecture and RTL of key ISP blocks or sub-systems end-to-end, from spec definition through tape-out and mass production.Architecture & PPA LeadershipDrive
Job Details: Job Description: We are looking for energetic & experienced SoC Frontend Integration Engineer at various level to be part of our growing team to drive the frontend integration of complex System-on-Chip (SoC) FPGA designs.
JOB DESCRIPTION: Job Role Description (e.g. main job functions): MY & SG: 1. Inbound (Import) Send ASN for warehouse deliveries from airport/port to 4PL (SG) Track and update shipment status Upload K1 number for ADD &
Company Description Bosch has been present in Malaysia since 1923, represented by Robert Bosch Sdn Bhd, with offices located in Selangor and Penang. In Malaysia, Bosch has diversified businesses in Mobility Solutions, Industrial Technology, Consumer Goods,
