ASIC Design Engineer Kuala Lumpur Full-time Production / Manufacturing / Processing Responsibilities ResponsibilitiesISP Module RTL DesignDesign and implement RTL for one or more blocks in the ISP pipeline (RAW / RGB / YUV domain, 3A statistics, geometric
Senior Staff ASIC Design Engineer Kuala Lumpur Full-time Production / Manufacturing / Processing Responsibilities ResponsibilitiesISP Module / Sub-System OwnershipOwn the micro-architecture and RTL of key ISP blocks or sub-systems end-to-end, from spec definition through tape-out and mass